SAE J2628_201307 PDF
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Characterization, Conducted Immunity
Description
The methods included in this document are:
a
Voltage-Temperature Design Margins.
b
Voltage Interruptions and Transients.
c
Voltage Dropouts and Dips.
d
Current Draw Under a Number of Conditions.
e
Switch Input Noise
These methods are best applied during the Development stage but can be used at all stages (e.g., Pre-Qualification, Qualification or Conformity).
History
| J2628_201806 | 2018-06-12 | Latest | Stabilized |
| J2628_201307 | 2013-07-16 | Historical | Revised |
| J2628_200707 | 2007-07-19 | Historical | Revised |
| J2628_200504 | 2005-04-29 | Historical | Revised |
| J2628_200208 | 2002-08-05 | Historical | Issued |
| ISSUING COMMITTEE | Electromagnetic Compatibility (EMC) Standards |
|---|---|
| DATE | 2013-07-16 |
| DOI | |
| ISCURRENT | |
| PAGE | 18 |
| PUBLISHER | SAE International |
| REVISED | REVISED |
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